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Prediction of SRAM reliability under mechanical stress induced by harsh environments

 
: Warmuth, Jens; Giering, Kay-Uwe; Lange, André; Clausner, André; Schlipf, Simon; Kurz, Gottfried; Otto, Michael; Paul, Jens; Jancke, Roland; Aal, Andreas; Gall, Martin; Zschech, Ehrenfried

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Postprint urn:nbn:de:0011-n-5127277 (3.8 MByte PDF)
MD5 Fingerprint: ba69bde73d76411cac7c391524aef8d8
Erstellt am: 9.10.2018


Institute of Electrical and Electronics Engineers -IEEE-:
48th European Solid-State Device Research Conference, ESSDERC 2018. Proceedings : September 3-6, 2018, Dresden, Germany
Piscataway, NJ: IEEE, 2018
ISBN: 978-1-5386-5402-6
ISBN: 978-1-5386-5401-9
ISBN: 978-1-5386-5400-2
S.178-181
European Solid-State Device Research Conference (ESSDERC) <48, 2018, Dresden>
Bundesministerium für Bildung und Forschung BMBF
RESIST
Englisch
Konferenzbeitrag, Elektronische Publikation
Fraunhofer IIS, Institutsteil Entwurfsautomatisierung (EAS) ()
Fraunhofer IKTS ()
SRAM stability; SRAM reliability; mechanical stress; device simulation; piezoresistance; SPICE-simulation; Monte-Carlo simulation

Abstract
On the example of a 28nm SRAM array, this work presents a novel reliability study which takes into account the effect of externally applied mechanical stress in circuit simulations. This method is able to predict the bit failures caused by the stress via the piezoresistive effect. The stability of each single SRAM cell is simulated using static noise margin. Finally, the whole array’s behavior is reproduced by including device parameter variations in Monte-Carlo simulations. The results show good agreement with corresponding experiments in which mechanical stress was introduced into the SRAM array by indentation. This validates the presented simulation method for future use in the design of electronic products, especially for harsh environment applications, where high stress is expected.

: http://publica.fraunhofer.de/dokumente/N-512727.html