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Securing FPGA SoC configurations independent of their manufacturers

: Jacob, N.; Wittmann, J.; Heyszl, J.; Hesselbarth, R.; Wilde, F.; Pehl, M.; Sigl, G.; Fischer, K.


Alioto, M. ; Institute of Electrical and Electronics Engineers -IEEE-; IEEE Circuits and Systems Society:
30th IEEE International System on Chip Conference, SOCC 2017. Proceedings : September 05-08, 2017, Munich, Germany
Piscataway, NJ: IEEE, 2017
ISBN: 978-1-5386-4034-0
ISBN: 978-1-5386-4033-3
ISBN: 978-1-5386-4035-7
International System on Chip Conference (SOCC) <30, 2017, Munich>
Fraunhofer AISEC ()

System-on-Chips which include FPGAs are important platforms for critical applications since they provide significant software performance through multi-core CPUs as well as high versatility through integrated FPGAs. Those integrated FP-GAs allow to update the programmable hardware functionality, e.g. to include new communication interfaces or to update cryptographic accelerators during the life-time of devices. Updating software as well as hardware configuration is required for critical applications such as e.g. industrial control devices or vehicles with long life-times. Such updates must be authenticated and possibly encrypted. One way to achieve this is to rely on static FPGA manufacturer-provided cryptography and respective master keys. However, in this contribution, we show how to retrofit Xilinx Zynq FPGAs with an alternative cryptographic accelerator and how to establish device-individual keys using Physical Unclonable Function (PUF) technology. These two key aspects reduce the required trust in manufacturer-provided security features while increasing the security by binding configurations to a specific device.