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Evaluation of a median threshold based EEPROM-PUF concept implemented in a high temperature SOI CMOS technology

 
: Willsch, Benjamin; Heesen, Marius te; Hauser, Julia; Dreiner, Stefan; Kappert, Holger; Vogt, Holger

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Institute of Electrical and Electronics Engineers -IEEE-:
13th IEEE International Conference on Design & Technology of Integrated Systems in Nanoscale Era, DTIS 2018. Proceedings : 9-12 April 2018, Taormina, Italy
Piscataway, NJ: IEEE, 2018
ISBN: 978-1-5386-5291-6
ISBN: 978-1-5386-5290-9
ISBN: 978-1-5386-5292-3
6 S.
International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS) <13, 2018, Taormina>
Englisch
Konferenzbeitrag
Fraunhofer IMS ()

Abstract
Physically Unclonable Functions (PUFs) are a new type of hardware-bounded cryptographic primitives. PUFs leverage random process variations to generate unique keys suitable for the use in low-cost device identification and authentication applications. Since the keys are typically derived from a large number of semiconductor devices, a space- and power-saving implementation of PUFs in non-volatile memory is appealing. In this paper, a median threshold based PUF concept was experimentally evaluated for 68 EEPROM arrays fabricated in a high temperature 1 ßm SOI CMOS technology. As-is realization of the concept yielded poor results regarding the randomness and uniqueness of the generated keys featuring an average inter-Hamming distance of only 30.24% (ideal value: 50%). The observed bias could be attributed to the presence of systematic trends induced by an asymmetric cell layout of the EEPROM arrays. To mitigate the effect of systematic process variations, a simple optimization procedure is proposed that has significantly increased the average inter-Hamming distance by more than 18 percentage points.

: http://publica.fraunhofer.de/dokumente/N-494682.html