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2017
Conference Paper
Titel
Substrate biasing effects in a high-voltage, monolithically-integrated half-bridge GaN-chip
Abstract
This paper investigates substrate biasing effects in a monolithically-integrated half-bridge stage rated for 600 V/20A and fabricated in a lateral AlGaN/GaN-on-Si technology. On resistance degradation effects caused by the common substrate potential are analyzed and explained for the monolithic half-bridge stage operating in a 400V-synchronous buck converter. The detailed analysis of an ungated TLM-structure processed on the same epitaxial stack supports the understanding of physical processes during substrate bias conditions. The findings obtained are then transferred to the half-bridge IC. Finally, mitigation techniques are discussed, and 5 MHz, 400V-to-200V power conversion is demonstrated at a power level of 250W.
Author(s)