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Towards trace-driven cache attacks on Systems-on-Chips - exploiting bus communication

: Sepulveda, J.; Gross, M.; Zankl, A.; Sigl, G.


Institute of Electrical and Electronics Engineers -IEEE-:
12th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, ReCoSoC 2017. Proceedings : July 12-14, 2017, Madrid, Spain
Piscataway, NJ: IEEE, 2017
ISBN: 978-1-5386-3345-8 (Print)
ISBN: 978-1-5386-3344-1
International Symposium on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC) <12, 2017, Madrid>
Fraunhofer AISEC ()

The growing complexity of Systems-on-Chips (SoCs) increases the risk of software attacks during runtime. A critical threat to system security are so-called side-channel attacks based on the processor cache and its usage during the execution of cryptographic algorithms. Recent publications have analyzed cache attacks on mobile devices and network-on-chip platforms. In this work, we investigate cache attacks on bus-like tile-based Multi-Processor Systems-on-Chips (MPSoCs). This work presents two contributions. First, we demonstrate a trace-driven cache attack on AES-128 based on the exploitation of bus communication. Second, we integrate two countermeasures (Shuffling and Mini-table) and evaluate their impact on the trace-based cache attack and on the performance of the system. The results illustrate that trace-driven attacks based on bus communication are a non-negligible threat in SoC environments. The results also show that the protection techniques are feasible to implement and that they are able to mitigate the attacks.