Hier finden Sie wissenschaftliche Publikationen aus den Fraunhofer-Instituten.

Fabrication of 3D hybrid pixel detector modules based on TSV processing and advanced flip chip assembly of thin read out chips

: Zoschke, K.; Opperman, H.; Fritzsch, T.; Rothermund, M.; Oestermann, U.; Grybos, P.; Kasinski, K.; Maj, P.; Szczygiel, R.; Voges, S.; Lang, K.-D.


IEEE Components, Packaging, and Manufacturing Technology Society:
ECTC 2017, the 67th Electronic Components and Technology Conference : 30 May-2 June 2017, Lake Buena Vista, Florida. Proceedings
Piscataway, NJ: IEEE, 2017
ISBN: 978-1-5090-6315-4 (online)
ISBN: 978-1-5090-6316-1 (print)
ISBN: 978-1-5090-4332-3 (USB)
Electronic Components and Technology Conference (ECTC) <67, 2017, Buena Vista/Fla.>
Fraunhofer IZM ()

In this article we present the conception, technological fabrication and electrical characterization of 3D hybrid pixel detector modules based on read out chips (ROCs) with through silicon vias (TSVs) which are flip chip bonded onto silicon photon sensors for X-ray detection. The TSVs in the ROCs enable a vertical routing of their peripheral IOs to the back side where they are spread to a land grind array (LGA) with 800 μm pitch. Thus, the back side of the ROCs can be used for next level interconnection to LTCC system boards which allows a pure vertical system architecture. With this routing concept, area-consuming wire bond connections from the peripheral IOs of the ROCs to the system board can be avoided which is the base for edgeless detector configurations with a tiled assembly of ROCs without imaging dead zones. To enable the envisioned vertical system concept, the ROCs were post-processed with 100 μm deep copper filled TSVs, front and back side redistribution, micro solder bumps for connection to the detector and land grid array (LGA) for connection to the system board. The UFXC32k (Ultra Fast X-ray Chip with 32k channels) served as ROC device featuring an array of 32768 pixel IOs using a pitch of 75 mm, 87 peripheral chip IOs and a total size of 2 cm2. The sensor tiles were post-processed with copper pads to enable a side by side flip chip assembly of two ROCs onto each sensor. The LGAs on the back side of the ROCs were used to mount the sub-modules to the LTCC system boards, which were pre-assembled with SMDs and corresponding solder ball arrays. The fabricated 3D hybrid pixel modules show a good electrical performance and passed real X-ray imaging experiments. A high interconnect yield was achieved with only maximum 17 dead pixels out of 65536 total pixels per detector. These investigations took place in a joint project between Fraunhofer IZM in Berlin and AGH University of Science and Technology in Krakow.