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Comparison between thermal simulations and experimental measurements on an advanced microelectronics test-system

 
: Papaioannou, Dimitrios; Heinig, Andy

:

IEEE Components, Packaging, and Manufacturing Technology Society:
16th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems, ITherm 2017 : May 30 – June 2, 2017, Walt Disney World Swan & Dolphin Hotel, Lake Buena Vista (Orlando) USA(Co-Located with ECTC)
Piscataway, NJ: IEEE, 2017
ISBN: 978-1-5090-2994-5 (online)
ISBN: 978-1-5090-2993-8 (USB)
ISBN: 978-1-5090-2995-2 (print)
S.428-435
Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm) <16, 2017, Orlando/Fla.>
Englisch
Konferenzbeitrag
Fraunhofer IIS, Institutsteil Entwurfsautomatisierung (EAS) ()

Abstract
The thermal challenges that emerge from the power dissipated by the integrated circuits inside a packaged microelectronics design play an important role in the behavior of the system. The need on higher component density with advanced performance in terms of speed and bandwidth, but in a narrower space may cause thermal, mechanical, and thermomechanical effects that can lead to degradation, limited performance and possible failure of the elements of the assembly. Such effects must be studied and their influence must be predicted prior to the chip fabrication in order to predict any degraded performance or failure mechanisms in the dies, the system components and the package; in this direction Multiphysics simulation tools can be used. By defining the appropriate design and giving the model parameters, material properties (such as thermal conductivity, material density and heat capacity) and the right boundary conditions, we are able to investigate the behavior of the modeled IC, system, or package and observe any possible areas of elevated temperature. In this direction, we have modeled, simulated and investigated the thermal behavior of an advanced integrated microelectronics system, including a System-in-Package component, a CMOS analog multiplexer, several NTC (negative temperature coefficient) thermistors, and two chip power resistors of the CP series. Experimental measurements and simulations have been conducted for the described model; the temperature gradient and numerical values of temperature in selected points of the system have been extracted during the simulations and have been compared with the experimental results under 1W applied power in the system. Moreover, several parameters and their influence to the system behavior have been studied during the simulations: the thermal conductivity of the components of the design (e.g. the FR-4 and the copper part of the substrate, the nickel part of the resistors) and the natural convection coefficient. The first parameter is a material property, while the second concerns the heat transfer mechanism in the system and is related to the power dissipation and cooling processes. Under 1W power (dissipated by the chip power resistor) the resulted temperature gradient in the design leads to elevated temperature values in the components. The closer the components are to the heat-source, the higher these numerical values are. The applied natural convection coefficient parameter have ranged between 5-25 W/m2K in our simulations, while reduced values of the thermal conductivity have been implemented due to impurities in the included materials in the real model.

: http://publica.fraunhofer.de/dokumente/N-464391.html