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Development of a patterning process for releasing and sealing of post-CMOS MEMS pressure sensor membranes

 
: Walk, Christian; Vidovic, Nino; Görtz, Michael; Vogt, Holger

Otto, T. ; Fraunhofer-Institute for Electronic Nano Systems -ENAS-, Chemnitz; Fraunhofer-Institut für Zuverlässigkeit und Mikrointegration -IZM-, Berlin:
Smart Systems Integration 2017 : International Conference and Exhibition on Integration Issues of Miniaturized Systems, 8 - 9 March 2017, Cork, Ireland
Auerbach /Vogtl.: Verlag Wissenschaftliche Scripten, 2017
ISBN: 978-3-95735-057-2
ISBN: 3-95735-057-3
S.306-313
International Conference and Exhibition on Integration Issues of Miniaturized Systems <2017, Cork>
Englisch
Konferenzbeitrag
Fraunhofer IMS ()
post-CMOS; MEMS; pressure sensor

Abstract
In this work a sub-step of the fabrication of an absolute capacitive pressure sensor MEMS on top of a CMOS substrate is discussed. Especially for low pressure applications membrane diameters of more than 100 μm are required. A vapour phase etching of a sacrificial layer by side openings is assumed to be inappropriate due to the addressed diameters. To apply an isotropic HF-vapour phase etching process successfully, openings in the structural layer of the MEMS-structure to get access to the sacrificial layer have been utilized. Different designs of possible etch accesses are simulated regarding their impact on stress. It is shown that a diameter minimisation of vertical etch access tunnels is beneficial with respect to stress (under applied pressure) and regarding the conditions for sealing the cavity. Therefore, a side wall spacer process to minimise the diameters of vertical etch access tunnels to release MEMS-structures was developed. By the use of two applied hard masks the diameter of lithographically structured tunnels is reduced by about 260 nm.

: http://publica.fraunhofer.de/dokumente/N-439107.html