Abstract
Vertical and horizontal integration of components, different in shape, size, material, process and function, is a further step to miniaturize "smart" systems and combine their functionalities in one package. Many approaches have been taken toward this goal, offering solutions to replace the conventional wire-bonding integration method. These approaches include through silicon via (TSV), silicon interposer, redistribution layers (RDL) and component stacking on wafer level. When working with non-planar substrates (as opposed to the substrates used for semiconductor devices), these methods may not all be readily applicable. We introduce a new method for interconnection between multilayers of functional structures, formed on substrates with some level of 3D form factor. In the proposed method a polymer (Parylene) thin film is used as an insulation layer between the conductive multilayers and the interconnect vias are opened by a fine-tuned laser ablation process.