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Investigation of the reliability degradation of scaled SONOS memory transistors

 
: Ocker, J.; Slesazeck, S.; Hoffmann, R.; Beyer, V.; Skouris, A.; Srowik, R.; Buschbeck, S.; Günther, S.; Mikolajick, T.

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Institute of Electrical and Electronics Engineers -IEEE-; IEEE Electron Devices Society; IEEE Reliability Society:
IEEE International Integrated Reliability Workshop 2015. Final Report : Stanford Sierra Conference Center, S. Lake Tahoe, California, October 11-15, 2015
Piscataway, NJ: IEEE, 2015
ISBN: 978-1-4673-7396-8
ISBN: 978-1-4673-7395-1 (Print)
ISBN: 978-1-4673-7394-4 (CD-ROM)
S.13-16
International Integrated Reliability Workshop (IIRW) <2015, South Lake Tahoe/Calif.>
Englisch
Konferenzbeitrag
Fraunhofer IPMS ()

Abstract
The polarity-dependent device degradation during AC stress of polysicilicon-oxide-nitride-oxide-silicon (SONOS) transistor poses considerable reliability challenges for scaled SONOS gate oxide thicknesses. However, the mechanism responsible for the endurance degradation has been scarcely studied so far. Especially electrons injected from the gate are supposed to be responsible for the degradation. An on-chip test circuit was developed to measure those gate currents. A clear correlation was found with retention-after-cycling experiments and interface degradation measured with the pulsed-capacitance technique. Based on the results, defect generation in the tunnel oxide was identified as the main degradation mechanism. The results are supported by electrical simulation of the transient behavior of the SONOS gate dielectric during program and erase.

: http://publica.fraunhofer.de/dokumente/N-422399.html