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An 80 GHz programmable frequency divider for wideband mm-Wave frequency ramp synthesis

: Delden, M. van; Hasenaecker, G.; Pohl, Nils; Aufinger, K.; Musch, T.


Madihian, M. ; Institute of Electrical and Electronics Engineers -IEEE-; IEEE Microwave Theory and Techniques Society:
IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2015. Proceedings : August 26-28, 2015, Tohoku University, Sendai, Japan
Piscataway, NJ: IEEE, 2015
ISBN: 978-1-4673-7795-9 (Print)
ISBN: 978-1-4673-7794-2
International Symposium on Radio-Frequency Integration Technology (RFIT) <2015, Sendai>
Fraunhofer FHR ()

A programmable frequency divider operating at input frequencies from DC to 80 GHz for the use in fractional-N synthesizers is presented. The division factor can be set to all integer values between 12 and 259 and is applied by an 8 bit parallel interface for fast modulation. The remarkably high input frequency in combination with the programmability is achieved by a dual-modulus concept and differential emitter-coupled logic with a consequent merging of logic gates into flip-flops. Among this, a reset function has been implemented to synchronize multiple synthesizers. The frequency divider has been realized in a SiGe BiCMOS technology (fr/fmax=250/360 GHz). The divider works at a supply voltage of 3.3 V with a power consumption of less than 390 mW.