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Assessing the effect of die sealing in Cu/Low-k structures

: Kearney, A.V.; Vairagar, A.V.; Geisler, H.; Zschech, Ehrenfried; Dauskardt, R.H.


Institute of Electrical and Electronics Engineers -IEEE-; IEEE Electron Devices Society:
IEEE International Interconnect Technology Conference, IITC 2007 : Burlingame, CA, 3 - 6 June 2007
Piscataway, NJ: IEEE Service Center, 2007
ISBN: 1-4244-1069-X (Print)
ISBN: 1-4244-1070-3
International Interconnect Technology Conference (IITC) <10, 2007, Burlingame/Calif.>
Fraunhofer IKTS ()
capacitive sensors; dielectric materials; fatigue; materials reliability

The integration of porous low-k dielectric materials in backend structures in microelectronics has presented numerous processing and reliability challenges, as their porous structure make them mechanically weaker than the fully dense materials they have replaced. Sawing of the wafer into individual die can nucleate cracking along the perimeter which can propagate to reduce device yield and significantly impact the interconnect structure. Die sealing structures have been shown to substantially increase the fracture and damage resistance of the interconnect structure. In this study, we describe fracture mechanics methods using both monotonic and cyclic fatigue loading to assess the effects of die seal structures.