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Process control and physical failure analysis for sub-100NM CU/Low-K structures

 
: Zschech, Ehrenfried; Huebner, R.; Potapov, P.; Zienert, I.; Meyer, M.A.; Chumakov, D.; Geisler, H.; Hecker, M.; Engelmann, H.-J.; Langer, E.

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Institute of Electrical and Electronics Engineers -IEEE-; IEEE Electron Devices Society:
IEEE International Interconnect Technology Conference, IITC 2008. Proceedings : Hyatt Regency Hotel, Burlingame, CA, June 2 - 4, 2008
Piscataway, NJ: IEEE, 2008
ISBN: 978-1-4244-1911-1 (Print)
S.67-69
International Interconnect Technology Conference (IITC) <2008, Burlingame/Calif.>
Englisch
Konferenzbeitrag
Fraunhofer IKTS ()
bonding; CMOS technology; copper; degradation

Abstract
For successfully developing and controlling BEoL structures of the 32 nm CMOS technology node and beyond, advanced analytical techniques are needed for process development and control, for physical failure localization and analysis as well as for the investigation of reliability-limiting degradation mechanisms. These challenges are discussed from the point of view of a high volume leading-edge manufacturing.

: http://publica.fraunhofer.de/dokumente/N-382061.html