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Current and future 3D activities at Fraunhofer

: Heinig, A.; Chaudhary, M.W.; Schneider, P.; Ramm, P.; Weber, J.


Institute of Electrical and Electronics Engineers -IEEE-:
IEEE International 3D Systems Integration Conference, 3DIC 2015 : 31 August - 02 September 2015, Sendai, Japan
Piscataway, NJ: IEEE, 2015
ISBN: 978-1-4673-9384-3
International 3D Systems Integration Conference (3DIC) <2015, Sendai>
Fraunhofer IIS, Institutsteil Entwurfsautomatisierung (EAS) ()
Fraunhofer EMFT ()

In this presentation we will show different manufacturing approaches for TSVs which results in different shapes and dimensions. For example, geometries for tungsten filled very small TSVs (smaller than 5um) into very thin 2D chips (under 50um thickness) are shown. Also different assembly technologies for the mounting of the different chips to 2.5D and real 3D systems are explained. The usage of such 2.5 or 3D integrated systems in real world examples for high bandwidth processor memory communications are demonstrated.