
Publica
Hier finden Sie wissenschaftliche Publikationen aus den Fraunhofer-Instituten. Abstract technology handling for generator-based analog circuit design
| VDE/VDI-Gesellschaft Mikroelektronik, Mikro- und Feinwerktechnik -GMM-: Zuverlässigkeit und Entwurf - Reliability by Design : Beiträge der 8. GMM/ITG/GI-Fachtagung, 21. – 23. September 2015 in Siegen, ZuE 2015; CD-ROM Berlin: VDE-Verlag, 2015 (GMM-Fachbericht 83) ISBN: 978-3-8007-4071-0 ISBN: 3-8007-4071-0 S.56-61 |
| Fachtagung "Zuverlässigkeit und Entwurf" (ZuE) <8, 2015, Siegen> |
| Bundesministerium für Bildung und Forschung BMBF 16ES0240; Things2Do |
|
| Englisch |
| Konferenzbeitrag, Elektronische Publikation |
| Fraunhofer IIS, Institutsteil Entwurfsautomatisierung (EAS) () |
Abstract
Designing analog and mixed-signal integrated circuits is still a matter of comprehensive manual tasks. Although a variety of optimization-based and procedural generator-based analog design automation approaches have been presented, they still lack a proper handling of so-called expert knowledge in an abstract way. We present a new method to capture expert knowledge by an abstract, generator-based analog circuit description. This approach moves detailed procedural circuit descriptions further towards a high-level description. Using the presented method, the circuit is defined by generic code which is converted to an abstract graph representation. The graph is subsequently used to apply technology-specific design rules and further constraints to ensure DRC-clean and robust layouts. As a result, a much wider set of advanced technology nodes can be targeted by the same parameterizable, procedural circuit description compared to previous approaches. Therefore, re-use of dedicated circuit blocks is improved which both eases utilization by designers and supports circuit optimization.