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Integration of active and passive components using chip in polymer technology
|Surface Mount Technology Association -SMTA-:|
SMTA International Conference 2005. Proceedings. CD-ROM : Sept. 25-29, 2005, Chicago/Illinois
Edina, Minn.: SMTA, 2005
|Surface Mount Technology Association (SMTA International Conference) <2005, Chicago/Ill.>|
|Fraunhofer IZM ()|
An increasing number of mobile electronic products were introduced to the market like mobile communicators, combining the functions of a mobile phone and a PDA. These devices require a constantly rising packaging density and operating frequencies. Additionally the product life time is going down, requiring short design cycles and a production at low-cost based on well established technologies. This paper will give an overview about the continuous development of the Chip in Polymer embedding technology. The first approaches were done using a liquid dielectric material, embedding thin semiconductor chips of 40 to 60µm thickness into build-up layers of printed circuit boards (PCB´s). Via contacts are made to the chip contacts as well as to the PCB Cu lines. Finally Cu is applied by electroless deposition and/or electroplating, thereby connecting electrically the chips to the PCB. Using this approach, a first application of the Chip in Polymer technology, a stackable Chip ScalePackage (3D-CSP), has been realized. The CSP´s are manufactured on 100x100 mm2 FR4 panels of 500 µm thickness, each one containing 25 Packages. Besides the die bonding of the thin chips all other process steps are performed on the whole panel, like dielectric application, structuring and metallization. To enable the introduction of chip embedding technologies into existing production environments a second approach for technology was used. The key technology steps here are the die bonding of thin chips, the embedding of the chips into a dielectric layer using vacuum lamination technology, laser drilling of vias to the chip pads and finally deposition and structuring of Cu conductor lines. As a significant aspect of the process development, the contact to the chip bondpads, will be discussed. Here different technological alternatives will be presented in detail. A further key element is the use of a 355 nm UV laser for drilling of microvias directly to the chip bondpads and for laserdirect imaging of the conductor lines. Details of the laser structuring technology will be described including also cost aspects.