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SIMD acceleration for HEVC decoding

 
: Chi, C.C.; Alvarez-Mesa, M.; Bross, B.; Juurlink, B.; Schierl, T.

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IEEE transactions on circuits and systems for video technology 25 (2015), Nr.5, S.841-855
ISSN: 1051-8215
ISSN: 1558-2205
Englisch
Zeitschriftenaufsatz
Fraunhofer HHI ()

Abstract
Single instruction multiple data (SIMD) instructions have been commonly used to accelerate video codecs. The recently introduced High Efficiency Video Coding (HEVC) codec like its predecessors is based on the hybrid video codec principle and, therefore, is also well suited to be accelerated with SIMD. In this paper we present the SIMD optimization for the entire HEVC decoder for all major SIMD instruction set architectures. Evaluation has been performed on 14 mobile and PC platforms covering most major architectures released in recent years. With SIMD, up to 5× speedup can be achieved over the entire HEVC decoder, resulting in up to 133 and 37.8 frames/s on average on a single core for Main profile 1080p and Main10 profile 2160p sequences, respectively.

: http://publica.fraunhofer.de/dokumente/N-352146.html