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Development of a scalelable interconnection technology for nano packaging

: Becker, K.-F.; Löher, T.; Pahl, B.; Wittler, O.; Jordan, R.; Bauer, J.; Aschenbrenner, R.; Reichl, H.

Nano Science and Technology Institute -NSTI-:
NSTI Nanotechnology Conference and Trade Show 2005. Vol.2: ICCN : NSTI Nanotech 2005, May 8 - 12, 2005, Anaheim Marriott & Convention Center, Anaheim, California, USA
Cambridge, Mass. [u.a.]: NSTI, 2005
ISBN: 0-9767985-1-4
ISBN: 0-9767985-5-7
ISBN: 0-9767985-4-9
Nanotechnology Conference and Trade Show (Nanotech) <2005, Anaheim/Calif.>
Fraunhofer IZM ()

Microelectronics miniaturization is following Moore?s law since the mid sixties and over the years it has always been possible to follow it without meeting fundamental technological limits. This might be in question for future applications, where SIA roadmap shows a red brick wall for the further development of microelectronics without fundamentally new approaches. These new approaches as single atom and CNT based transistors do all target on maximum integration on chip level, leading to increased interconnect density and thus to a miniaturization of the individual contact. Parallel to the miniaturization of the interconnects the development of scaleable interconnect technology is necessary, providing reliable infrastructure for future packaging needs. At Fraunhofer IZM various approaches towards a scaleable interconnect technology are researched. This paper will describe the development of reactive interconnects, i.e. contacts that need no external energy source, but release the energy for solder interconnect formation by exothermic reaction of a nano-enhanced encapsulant. Potential areas of application are interconnection of thermally sensitive devices as bio sensors or interconnection on low cost substrates, e.g. for the smart card applications or the expanding RF ID tag market. The current status of technological developments for the realization of reactive interconnects is described, including interconnect bumping, reactant application and interconnect formation. These technological processes are backed by thermal simulation. Summarized, this paper shows the potential of reactive interconnects being a "drop in" solution that not only allows the cost effective packaging of today?s µscale ICs but also tomorrows nano-scale devices.