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On the optimization of the return current paths of signal vias in high-speed interposers and PCBs using the M3-approach

: Ndip, I.; Löbbicke, K.; Tschoban, C.; Ranzinger, C.; Richlowski, K.; Contag, A.; Reichl, H.; Lang, K.-D.; Henke, H.


Institute of Electrical and Electronics Engineers -IEEE-:
IEEE International Symposium on Electromagnetic Compatibility, EMC 2014. Proceedings : 4-8 August 2014, Raleigh, North Carolina
Piscataway, NJ: IEEE, 2014
ISBN: 978-1-4799-5544-2 (Print)
ISBN: 978-1-4799-5545-9
International Symposium on Electromagnetic Compatibility (EMC) <2014, Raleigh/NC>
Fraunhofer IZM ()

In this paper, the return-current paths of signal vias transiting multilayered stack-ups are optimized using the M3-approach (methodologies, models, measures). A methodology for suppressing the excitation of parallel-plate modes in these stack-ups is first proposed. The result of this methodology is a stack-up with well-defined paths for the returning conduction currents. Secondly, a model of the stack-up is developed and experimentally verified using measurement results. The model is then applied to study the impact of the impedance of the return-current paths on the effectiveness of the proposed stack-up in suppressing the excitation of cavity resonance modes. Based on the results of this study, appropriate designs measures for optimizing the return-current paths of the signal vias are derived. To demonstrate the advantages of these measures, they are applied to fabricate a new test board with the proposed stack-up. The measurement results show excellent signal transmission and no dips in the insertion loss of the signal via for frequencies up to 20 GHz.