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Hardware/software infrastructure for ASIC commissioning and rapid system prototyping

 
: Reichel, Peter; Döge, Jens

:
Postprint urn:nbn:de:0011-n-3364267 (225 KByte PDF)
MD5 Fingerprint: 4122d994c07c41e88069716f9e196da7
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Erstellt am: 22.3.2017


Institute of Electrical and Electronics Engineers -IEEE-:
ReConFig 2014, International Conference on ReConFigurable Computing and FPGAs : 08.12.- 10.12.2014, Cancún, Mexico
Piscataway, NJ: IEEE, 2014
ISBN: 978-1-4799-5944-0
ISBN: 978-1-4799-5943-3
6 S.
International Conference on ReConFigurable Computing and FPGAs (ReConFig) <2014, Cancun>
Bundesministerium für Bildung und Forschung BMBF
KMU-innovativ; 13N11367; FemoBiDiS
Englisch
Konferenzbeitrag, Elektronische Publikation
Fraunhofer IIS, Institutsteil Entwurfsautomatisierung (EAS) ()
rapid system prototyping; hardware/software co-design; Embedded Linux; image sensor characterization; ASIC commissioning; FPGA

Abstract
FPGAs are a key enabling technology for rapid and efficient system prototyping and initial commissioning of newly developed integrated circuits. One major aspect is the setup and control of interface components between devices under test (DUT) and the FPGA infrastructure. So as to maintain high flexibility in conjunction with the ability to deal with changes of requirements and use cases, as well as unforeseen or faulty behavior of the DUT, we propose a novel reconfigurable hardware/software infrastructure. IP blocks, such as register files or interface components to external hardware, are attached as leafs to a tree-like communication system optimized for alterations. It is designed as an Embedded-Linux-compatible CPU subsystem to be accessed from user space via a uniform and portable kernel driver. Thus, it implements transparent access to custom functionality from user applications, without specific knowledge concerning the hardware/software coupling.

: http://publica.fraunhofer.de/dokumente/N-336426.html