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Broadband FPGA payload processing in a harsh radiation environment

: Rittner, F.; Glein, R.; Kolb, T.; Bernard, B.


Institute of Electrical and Electronics Engineers -IEEE-; United States, National Aeronautics and Space Administration -NASA-; European Space Agency -ESA-, Paris:
NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2014. Proceedings : July 14 - 18, 2014, Peter Williams Lecture Theatre, University of Leicester, Leicester, UK
Piscataway, NJ: IEEE, 2014
ISBN: 978-1-4799-5356-1
Conference on Adaptive Hardware and Systems (AHS) <9, 2014, Leicester>
Fraunhofer IIS ()

In this paper, we propose a concept for broadband Digital Signal Processing under consideration of mitigation schemes to increase the reliability. We take Single Event Upsets into account to guarantee a reliable operation during a In-Orbit-Verification. It will be performed on the Fraunhofer On-Board Processor, which is a dynamically reconfigurable On-Board Processor platform based on two space-grade Virtex-5QV FPGAs. A master and slave FPGA concept enables broadband Digital Signal Processing experiments, which are controlled and monitored by the high reliable master FPGA. Each FPGA processes a separated signal path of the Fraunhofer On-Board Processor. The first FPGA executes scrubbing of both FPGAs, measures the current radiation and observes the whole system with a fault management. The second FPGA realizes only the broadband Digital Signal Processing, which results in more usable resources. We analyze the impact of the radiation to point out the influence to the FPGAs. A case study demonstrates a Digital Down Converter for broadband Digital Signal Processing. This hardware verification evaluates a 306 Mbit/s broadband signal, modulated with Quadrature Phase-Shift Keying. It results in a Signal-to-Noise Ratio of 19.29 dB. Due to separation of mitigation schemes and broadband Digital Signal Processing the system operates reliable and the resources are used efficient.