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Hier finden Sie wissenschaftliche Publikationen aus den Fraunhofer-Instituten. Hysteresis-free carbon nanotube field-effect transistors without passivation
| Institute of Electrical and Electronics Engineers -IEEE-; IEEE Computer Society; Association for Computing Machinery -ACM-: IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2014. Proceedings : 8-10 July 2014, Paris, France Piscataway, NJ: IEEE, 2014 ISBN: 978-1-4799-6383-6 ISBN: 978-1-4799-6384-3 S.137-138 |
| International Symposium on Nanoscale Architectures (NANOARCH) <2014, Paris> |
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| Englisch |
| Konferenzbeitrag |
| Fraunhofer ENAS () |
Abstract
Back-gated carbon nanotube field-effect transistors have been fabricated using a wafer-level technology. Source and drain electrodes are structured by lift-off and wet etching. AFM measurements reveal residual contaminations originating from structuring processes. We investigate the particle removal by an oxygen plasma treatment depending on the process time. I/V characterization reveals a strong dependency of transistor characteristics, especially hysteresis behavior, on surface cleanliness. We find the removal of residual particles to be much more important than a passivation to keep water molecules from the transistor region. We show hysteresis-free transistor behavior even after 9 weeks of storage in air without passivation.