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Role of the dielectric for the charging dynamics of the dielectric/barrier interface in AlGaN/GaN based metal-insulator-semiconductor structures under forward gate bias stress

: Lagger, Peter; Steinschifter, P.; Reiner, M.; Stadtmüller, M.; Denifl, G.; Naumann, Andreas; Müller, Johannes; Wilde, Lutz; Sundqvist, Jonas; Pogany, D.


Applied Physics Letters 105 (2014), Nr.3, Art. 033512, 5 S.
ISSN: 0003-6951 (Print)
ISSN: 1077-3118
ISSN: 1931-9401 (online)
Fraunhofer IPMS ()

The high density of defect states at the dielectric/III-N interface in GaN based metal-insulator-semiconductor structures causes tremendous threshold voltage drifts, ΔV th, under forward gate bias conditions. A comprehensive study on different dielectric materials, as well as varying dielectric thickness t D and barrier thickness t B, is performed using capacitance-voltage analysis. It is revealed that the density of trapped electrons, ΔN it, scales with the dielectric capacitance under spill-over conditions, i.e., the accumulation of a second electron channel at the dielectric/AlGaN barrier interface. Hence, the density of trapped electrons is defined by the charging of the dielectric capacitance. The scaling behavior of ΔN it is explained universally by the density of accumulated electrons at the dielectric/III-N interface under spill-over conditions. We conclude that the overall density of interface defects is higher than what can be electrically measured, due to limits set by dielectric breakdown. These findings have a significant impact on the correct interpretation of threshold voltage drift data and are of relevance for the development of normally off and normally on III-N/GaN high electron mobility transistors with gate insulation.