Hier finden Sie wissenschaftliche Publikationen aus den Fraunhofer-Instituten.

3D integration: Status and requirements

: Wolf, M. Jürgen; Lang, Klaus-Dieter

Surface Mount Technology Association -SMTA-:
Pan Pacific Microelectronics Symposium, PAN PAC 2014 : Held 11 - 13 February 2014, Kohala Coast, Hawaii, USA
Red Hook, NY: Curran, 2014
ISBN: 978-1-63266-060-2
Pan Pacific Microelectronics Symposium (PAN PAC) <2014, Kohala Coast/Hawaii>
Fraunhofer IZM ()

According to the increasing application driven demands on functionality, performance, miniaturization and reliability for microelectronic systems, System in Packages (SiP) using 3D integration are key elements for advanced micro-electronic packaging. Key elements for 3D wafer level SiPs are the formation of Through Silicon Vias (TSVs) and their process integration into active devices as well as silicon interposer as a key enabler for 3D Systems.