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Influence of diverse post-trench processes on the electrical performance of 4H-SiC MOS structures

: Banzhaf, C.T.; Grieb, M.; Trautmann, A.; Bauer, A.J.; Frey, L.


Okumura, H.:
Silicon Carbide and Related Materials 2013. Vol.1 : Selected, peer reviewed papers from the 15th International Conference on Silicon Carbide and Related Materials, (ICSCRM 2013), September 29 - October 4, 2013, Miyazaki, Japan
Dürnten: Trans Tech Publications, 2014 (Materials Science Forum 778-780)
ISBN: 978-3-03835-010-1 (Print)
ISBN: 978-3-03795-705-9 (CD-ROM)
ISBN: 978-3-03835-010-1 (Print + CD-ROM)
ISBN: 978-3-03826-391-3 (eBook)
International Conference on Silicon Carbide and Related Materials (ICSCRM) <15, 2013, Miyazaki>
Fraunhofer IISB ()

This paper focuses on the evaluation of subsequent process steps (post-trench processes, PTPs) after 4H silicon carbide (4H-SiC) trench etching with respect to the electrical performance of trenched gate metal oxide semiconductor field effect transistors (Trench-MOSFETs). Two different types of PTP were applied after 4H-SiC trench formation, a high temperature post-trench anneal (PTA) [1] and a sacrificial oxidation (SacOx) [2]. We found significantly improved electrical properties of Planar-MOS structures using a SacOx as PTP, prior to gate oxide deposition. Besides excellent quasi-static capacitance-voltage (QSCV) behavior even at T = 250 °C, charge-tobreakdown (QBD) results up to 8.8 C/cm2 at T = 200 °C are shown to be similar on trenched surfaces as well as on untrenched surfaces of SacOx-treated Planar-MOS structures. Moreover, dielectric breakdown field strengths up to 12 MV/cm have been measured on Planar-MOS structures. However, thick bottom oxide Trench-MOS structures indicate best dielectric breakdown field strengths of 9.5 MV/cm when using a trench shape rounding PTA as the PTP.