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Investigation of trenched and high temperature annealed 4H-SiC

: Banzhaf, C.T.; Grieb, M.; Trautmann, A.; Bauer, A.J.; Frey, L.


Okumura, H.:
Silicon carbide and related materials 2013. Vol.2 : Selected, peer reviewed papers from the 15th International Conference on Silicon Carbide and Related Materials 2013, (ICSCRM 2013), September 29 - October 4, 2013, Miyazaki, Japan
Durnten-Zurich: Trans Tech Publications, 2014 (Materials Science Forum 778-780)
ISBN: 978-3-03835-010-1
ISBN: 978-3-03826-391-3
International Conference on Silicon Carbide and Related Materials (ICSCRM) <15, 2013, Miyazaki>
Fraunhofer IISB ()

This study focuses on the effects of a high temperature anneal after dry etching of trenches (post-trench anneal, PTA) on 4H-silicon carbide (4H-SiC). We aim at the optimum 4H-SiC post-trench treatment with respect to the fabrication and the operation of a trenched gate metal oxide semiconductor field effect transistor (Trench-MOSFET). PTA significantly reduces microtrenches, also called sub-trenches [1], in the corners of the bottom of the trench. This is highly beneficial in case the etched trench sidewall is used as the channel of a Trench-MOSFET. However, PTA is also shown to cause a slight enlargement of the trench width along with a considerable increase of the substrate surface roughness. In addition, X-ray photoelectron spectroscopy (XPS) depth profiles indicate an increased carbon atom concentration at the 4H-SiC surface after the high temperature PTA. The non-stoichiometric surface composition affects the quasi-static capacitance-voltage (QSCV) behavior of MOS structures using a deposited gate oxide (GOX). We assume that a sacrificial oxidation directly after the PTA could restore a stoichiometric 4H-SiC surface.