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The common ground of interposer and 3D integration technology - hand in hand to face production concerns?

: Ramm, P.

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Future fab international (2013), Nr.45, S.74
ISSN: 1363-5182
Zeitschriftenaufsatz, Elektronische Publikation
Fraunhofer EMFT ()

First of all, I must admit that I don't like the naming "2.5D" for interposer technology; for a physicist, 2.5D is an outrageous term. On the other hand, as a technologist, I surely see advantages of interposers against "real" 3D integration: less complex design flow and testing, better thermal management–and potentially lower cost.
But be aware: 2.5D fabrication is not uncomplicated and not cheap. Although now entering application in low–volume and/or niche products, there are still big concerns in the industry for high–volume production, particularly regarding supply chain, cost readiness and reliability. Just as for 3D integration technology, the state–of–the–art interposer processes must deal with serious problems such as those related to thinning, handling and processing of thin silicon. Consequently, not only the IDMs but also foundries are looking to outsource these risky processes like handing over a hot potato… in some sense being analogous to fabless companies (as let's say "3D–less").
In Europe, there is a large–scale project e–BRAINS (www.e– focused on optimizing 3D TSV technologies for heterogeneous sensor integration. There, Siemens, in cooperation with Fraunhofer EMFT Munich, is also developing a high–performance interposer technology, but for thick–and thus stable–interposers. The applied TSV technology is based on photo–assisted etching, and can reach TSV diameters as small as ~2 µm through silicon wafers with standard thickness, realizing stable interposers with a low pitch.
I am confident that 3D integration will not come significantly later to production than interposer technology; interposer and 3D technology will go hand in hand, being chosen each time depending on the cost and the specifications for a distinctive product and market, according to Cristina Torregiani from Qualcomm.
In this issue there is a dedicated interposer paper from Surya Bhattacharya et al. from A*STAR's Institute of Microelectronics, and an excellent article on 3D scaling from Sitaram Arkalgud, formerly director at SEMATECH and now vice president of Invensas. I'm proud to say that as a first appearance in his new position, Arkalgud has accepted my invitation to be keynote speaker at this year's IMAPS DPC conference in Scottsdale, Ariz.