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Title
Verfahren zur Herstellung eines Halbleiterbauelements und Halbleiterbauelement
Date Issued
2011
Author(s)
Patent No
102011089759
Abstract
The method involves providing a support substrate (1) and forming intermediate layers (2a,2b) on the support substrate. A semiconductor layer (3) comprising silicon-based dielectric and silicon nano-crystals, is formed on the intermediate layers arranged on the substrate. The semiconductor layer is annealed at a temperature of 700[deg] C for preset time duration. A portion of support substrate is removed to access the semiconductor layer. An independent claim is included for a semiconductor component.
Language
de
Patenprio
DE 102011089759 A1: 20111223