Hier finden Sie wissenschaftliche Publikationen aus den Fraunhofer-Instituten.

Reliability study of the bump on flexible lead for wafer level packaging

: Kolb, I.; Wolf, M.J.; Ehrmann, O.; Reichl, H.

IMAPS 2009, 42nd International Symposium on Microelectronics : Bringing Together The Entire Microelectronics Supply Chain! November 1-5, 2009 San Jose Convention Center - San Jose, California, USA
San Jose, Calif., 2009
ISBN: 0-930815-89-0
International Symposium on Microelectronics <42, 2009, San Jose/Calif.>
Fraunhofer IZM ()

The Bump on Flexible Lead (BoFL) is a chip-to-substrate interconnect technology which uses flexible structures to accommodate the CTE mismatch between the chip and PCB substrate and therefore eliminates the need for underfill. The concept of the BoFL is based on wafer level packaging processing methods, such as photolithography, electroplating and wet-etching. The flexible lead consists of a copper redistribution layer embedded in a polyimide bridge which is located over an air gap. For the BoFL only 3 additional processing steps are necessary, compared to the conventional redistribution technology for wafer level chip size package (WL-CSP). Prototype chips (10 mm × 5 mm) with different lead shapes were fabricated and assembled on low cost FR-4 boards. The assembled chips were subjected to thermal cycling (-55°C/+125°C). A big influence of the shape and the orientation of the BoFL on the board-level reliability can be seen. The best results were obtained with the banana -shaped BoFL.