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3D packaging for image sensor application

 
: Wolf, M.J.; Klumpp, A.; Wieland, R.; Zoschke, K.; Klein, M.; Nebrich, L.; Heinig, A.; Weber, W.; Limansyah, I.; Ramm, P.; Reichl, H.

International Microelectronics and Packaging Society -IMAPS-:
International Conference and Exhibition on Device Packaging 2009 : Scottsdale/Fountain Hills, Arizona, USA, 9 - 12 March 2009
2009
ISBN: 978-1-615-67325-4
S.323-335
International Conference and Exhibition on Device Packaging <5, 2009, Scottsdale>
Englisch
Konferenzbeitrag
Fraunhofer IZM ()

Abstract
3D integration is a fast growing field that encompasses different types of technologies. One of the most promising technologies for interconnecting stacked devices on wafer level to perform high density interconnects with a good electrical performance and a small form factor is the Through Silicon Via (TSV) technology. The 3D image sensor with TSV silicon interposer offers more flexibility and higher degree of vision-based system integration. The integration does not require especially designed components. Basically, standard image sensor chips and specific DSP processors which are on the market today can be integrated by means of TSV silicon interposer. The interposer provides the electrical interconnection between the image sensor, the processor and allows a small form factor System in Package (SiP). To demonstrate the new 3D integration approach in an automotive driver assistance system a High Dynamic Range Camera (HDRC) and a new multi-core processor architecture (V TP-II) developed by Infineon were used. The new 3D system integration approach is expected to achieve a miniaturized modular based system and reduce the total cost of the camera based driver assistance system. The camera stack consists of two ICs, a Si interposer and a glass substrate on top. The pixel detector is flip chip bonded to the glass substrate using micro solder SnAg solder, the bumps were deposited by electroplating on chip side. Glass and Si interposer are connected peripheral by 320 urn diameter SAC solder balls. The ASIC is flip chip bonded to the 45 urn thick interposer by SnAg solder balls applying a NoFlow underfill bonding process. Around the bonded ASIC solder balls are located to finally connect the whole 3D system to a PCB. The paper will discuss the system architecture, the technical requirements and the technological approach for the realization of the complete 3D system.

: http://publica.fraunhofer.de/dokumente/N-263379.html