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Multiple flip-chip assembly for hybrid compact optoelectroi modules using electroplated AuSn solder Bumps

 
: Chu, K.-M.; Lee, J.-S.; Oppermann, H.; Engelmamr, G.; Wolf, J.; Reichl, H.; Jeon, D.Y.

International Microelectronics and Packaging Society -IMAPS-:
International Symposium on Microelectronics 2006. Proceedings : October 8 - 12, 2006, San Diego, California, USA
Washington, DC: IMAPS, 2006
ISBN: 0-930815-80-7
S.653-660
International Symposium on Microelectronics <39, 2006, San Diego/Calif.>
Englisch
Konferenzbeitrag
Fraunhofer IZM ()

Abstract
The hybrid integration of several electrical and optical chips 011 a common substrate is an important technology for merging highly functional optoelectronic modules. To fabricate such a hybrid compact optoelectronic module, it is essential to develop a multiple flip-chip assembly technique 011 a common substrate. In this study, four Si chips were flip-chip bonded successively 011 a common substrate using electroplated AuSn solder bumps. However the high thermal conductivity of the substrate and a multiple reflow process could make solder bumps formed 011 the substrate tend to be affected by neighboring ones significantly during several repeated bonding steps. As a result, it is difficult to perform an interconnection that shows high bonding strength. This paper will discuss the correlation between the successive multiple flip-chip assembly and after-bonding characteristics such as die shear strength, micro structures of remelted joints between AuSn solder bumps and chip pads.

: http://publica.fraunhofer.de/dokumente/N-263134.html