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Bumping technologies

: Töpper, Michael; Lu, D.


Tong, H.-M.:
Advanced Flip Chip Packaging
New York: Springer Science+Business Media, 2013
ISBN: 978-1-4419-5767-2 (Print)
ISBN: 978-1-4419-5768-9 (Online)
Aufsatz in Buch
Fraunhofer IZM ()

Electronic Packaging is more than housing of active and passive elements. Since the last decade packaging has evolved into the first step on system integration. In this sense Wafer Level Packaging (WLP) based on redistribution is the key technology for System in Package (SiP) and Heterogeneous Integration (HI) by three-dimensional (3D) packaging using Through Silicon Vias (TSV). Materials and process technologies are key for a reliable WLP. This chapter focuses on the materials and processes for WLP which are the basic for all new 3D integration technologies.