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3D simulation of process effects limiting FinFET performance and scalability

3D-Simulation von prozessierungsrelevanten Effekten, welche die Leistungsfähigkeit und Miniaturisierung von FinFETs beschränken
 
: Burenkov, A.; Lorenz, J.

Wachutka, G.:
Simulation of Semiconductor Processes and Devices 2004
Wien: Springer, 2004
ISBN: 3-211-22468-8
S.125-128
International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) <2004, München>
Englisch
Konferenzbeitrag
Fraunhofer IISB ()
process simulation; device simulation; device performance; device scalability; spread of process result

Abstract
Coupled three-dimensional process and device simulations have been applied to study effects limiting the performance of FinFETs, a novel CMOS transistors suggested to overcome the limitations of conventional CMOS for gate lengths at 50 nm and below.

: http://publica.fraunhofer.de/dokumente/N-23672.html