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Facilitate SIMD-code-generation in the polyhedral model by hardware-aware automatic code-transformation

 
: Feld, Dustin; Soddemann, Thomas; Jünger, Michael; Mallach, Sven

:
Volltext urn:nbn:de:0011-n-2347222 (981 KByte PDF)
MD5 Fingerprint: cac3e82981431b3bbb480721bd9d6d0e
Erstellt am: 29.3.2013


Größlinger, A.:
IMPACT 2013, 3rd International Workshop on Polyhedral Compilation Techniques. Proceedings : Berlin, Germany, January 21, 2013, in conjunction with HiPEAC 2013
Berlin, 2013
S.45-54
International Workshop on Polyhedral Compilation Techniques (IMPACT) <3, 2013, Berlin>
International Conference on High-Performance and Embedded Architectures and Compilers (HiPEAC) <8, 2013, Berlin>
Englisch
Konferenzbeitrag, Elektronische Publikation
Fraunhofer SCAI ()
polyhedral model; vectorization; SIMD; SSE; cache; parallelization

Abstract
Although Single Instruction Multiple Data (SIMD) units are available in general purpose processors already since the 1990s, state-of-the-art compilers are often still not capable to fully exploit them, i.e., they may miss to achieve the best possible performance. We present a new hardware-aware and adaptive loop tiling approach that is based on polyhedral transformations and explicitly dedicated to improve on auto-vectorization.

: http://publica.fraunhofer.de/dokumente/N-234722.html