Hier finden Sie wissenschaftliche Publikationen aus den Fraunhofer-Instituten.

Experimental and numerical reinvestigation for lifetime-estimation of plated through holes in printed circuit boards

: Nowak, T.; Schacht, R.; Walter, H.; Wunderle, B.; Ras, M.A.; May, D.; Wittler, O.; Lang, K.-D.

Courtois, Bernard (General Chair) ; Institute of Electrical and Electronics Engineers -IEEE-:
17th International Workshop on Thermal investigations of ICs and Systems, THERMINIC 2011 : 27-29 September 2011, Paris, France
Grenoble: EDA Publishing, 2011
ISBN: 978-2-35500-018-8
International Workshop on Thermal investigations of ICs and Systems (THERMINIC) <17, 2011, Paris>
Fraunhofer ENAS ()

Designers of electronic packages and electronic circuits require thermal optimization for electrical and thermal plated through holes (PTH) respectively to obtain a reliability estimate. Reliability depends on PTH-geometry and manufacturing process conditions which influence thermo-mechanical properties of the board (viscous-elasticity) and electroplated copper (e.g. yield stress). This information's, however, is needed and can only be obtained from thorough material characterization and failure analysis. The paper describes the material characterization of all board materials, especially for pure epoxy, the finite element modeling and simulation for a PTH, reliability tests on a special designed PTH test board and the results evaluation using the statistical Weibull distribution.