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Dynamic processor reconfiguration

 
: Hübner, Michael; Tradowsky, Carsten; Göhringer, Diana; Braun, Lars; Thoma, Florian; Henkel, Jörg; Becker, Jürgen

:

Atanas, P. ; Institute of Electrical and Electronics Engineers -IEEE-:
ReConFigurable Computing and FPGAs, ReConFig 2011 : 30.11.- 2.12.2011, Cancun, Mexico
New York, NY: IEEE, 2011
ISBN: 978-0-7695-4551-6
ISBN: 978-1-4577-1734-5
ISBN: 1-4577-1734-4
S.123-128
International Conference on ReConFigurable Computing and FPGAs (ReConFig) <2011, Cancun>
Englisch
Konferenzbeitrag
Fraunhofer IOSB ()
dynamic processor reconfiguration; FPGA; microarchitecture

Abstract
General purpose processors provide a well performance with adequate power consumption for a huge bandwidth of applications in average. However, most embedded systems target a very narrow or even single application domain which would benefit from a specific processor, optimized for this scenario in order to gain performance and to reduce power consumption. But the development of application specific processors for each application is a time consuming task and often not feasible for developers due to the missing toolsets or experience in processor design. This paper introduces a novel approach for a processor core, which is able to adapt its microarchitecture in relation to the application requirement. In general, the processor starts in a general purpose mode and migrates while run-time to a special purpose processor by adapting its microarchitecture. The paper introduces this novel processor approach which is called i-core and presents first experimental results.

: http://publica.fraunhofer.de/dokumente/N-190946.html