Hier finden Sie wissenschaftliche Publikationen aus den Fraunhofer-Instituten.

3D-interconnect: Visualization of extrusion and voids induced in copper-filled through-silicon vias (TSVs) at various temperatures using X-ray microscopy

: Kong, L.; Rudack, A.C.; Krueger, P.; Zschech, E.; Arkalgud, S.; Diebold, A.C.


Microelectronic engineering 92 (2012), S.24-28
ISSN: 0167-9317
Advanced Metallization Conference (AMC) <27, 2010, Albany/NY>
Zeitschriftenaufsatz, Konferenzbeitrag
Fraunhofer IZFP, Institutsteil Dresden ( IKTS-MD) ()

Visualization of voids and copper extrusion in copper-filled through-silicon vias (TSVs) under different annealing conditions is greatly enhanced using X-ray microscopy. In addition, the dimensions of the TSVs after Cu deposition can also be measured by 3D reconstruction. Surface inspection found mushroom defects on the top of TSVs after deposition of the etch stop layer, forming a small bump on top of the TSV. The 50 nm etch stop layer is part of the dielectric stack used before metal 1 is deposited on top of the TSVs. The TSVs are annealed, then undergo chemical mechanical polishing (CMP) before the etch stop layer is deposited at 350 °C. It is assumed that after CMP the etch stop layer on top of the TSVs is planar. However, cross-sectional scanning electron microscopy (XSEM) shows mushroom defects but no particles at the interface of the TSV and the etch stop layer. This study investigates the changes in copper extrusion and induced voiding that result from different annealing temperatures. Round TSVs 25 m deep and 4-5 m in diameter were filled with copper by electrochemical deposition (ECD), followed by chemical mechanical polishing and pre-annealing to 150 °C for one hour. Based upon the material properties of TSVs, the high density copper absorbs photon energy more strongly than silicon or air. This results in good contrast within the copper-filled vias when X-ray micrographs are taken and allows voids within the material to be seen. A lab-based X-ray microscope with 8 Kev X-ray energy allows a penetration of 50 m into the silicon. Consequently, sample preparation requires wafers to be backside polished from an initial thickness of 775 m to <50 m. When scanned with a lab-based X-ray microscope, a set of TSVs is imaged and the 3D X-ray tomography shows voids or seamlines at the bottom of the TSVs. This sample was annealed to 225 °C and 300 °C, respectively. Upon scanning the same TSVs, the X-ray micrograph shows the seamline changes shape, voids are induced at the center of TSVs, and copper extrudes on top of the TSVs. This suggests the copper extrusion causes the etch stop layer to form a defect at the top of the TSVs. An X-ray microscope offers the potential to inspect voids in multiple vias at the same time without a physical cross section of the TSVs. This technique can be used to advance the study of different stress-induced voids used for 3D interconnects.