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Title
Verfahren zur Qualitaetsverbesserung von Wafern sowie Verwendung des Verfahrens
Date Issued
2009
Author(s)
Reis, I.
Patent No
102009055685
Abstract
(A1) Die Erfindung betrifft ein Verfahren zur Qualitaetsverbesserung von Wafern, wobei ein Wafer bereichsweise erhitzt wird und Verunreinigungen im Wafer im Bereich von Stoerstellen konzentriert angeordnet werden. Weiterhin betrifft die Erfindung die Verwendung des Verfahrens, insbesondere bei der Herstellung von kristallinen Silizium-Solarzellen wie auch Silicium-Duennschichtsolarzellen, Sensoren, Aktoren, siliziumbasierten Leuchtdioden, Flachbildschirmen oder optischen Filtern sowie in der SOI-Technologie (silicon-on-insulator).
DE 102009055685 A1 UPAB: 20110609 NOVELTY - The method for improving quality of wafer, comprises heating the wafer in a tempering-step using a heat source by means of relative movement of the wafer to the heat source in layer-wise manner under formation of a temperature gradient, where the maximum temperature in the wafer is below the melting point of silicon. The impurities in the wafer are transported within areas, which have a higher temperature and are arranged in the area of impurity region. The impurity regions are grain boundaries or twin boundaries. DETAILED DESCRIPTION - The method for improving quality of wafer, comprises heating the wafer in a tempering-step using a heat source by means of relative movement of the wafer to the heat source in layer-wise manner under formation of a temperature gradient, where the maximum temperature in the wafer is below the melting point of silicon. The impurities in the wafer are transported within areas, which have a higher temperature and are arranged in the area of impurity region. The impurity regions are grain boundaries or twin boundaries. The wafer is guided on the heat source, which is bound stationary. Electron beam heater, laser beam source, graphite strip heater, halogen lamp heater, graphite strip heater, infrared emitter and/or ultraviolet heater is used as the heat source. The heat sources are arranged sequentially or next to one another. The temperature in the heating region is 500-800 degrees C. The impurities are copper, nickel, iron and chromium. In addition, a high temperature step such as a phosphorous getting step or a phosphorous diffusion step is carried out. The high-temperature step is carried out before the temperature step, where various temperature gradients exist through two heat sources. The high temperature step is carried out at 700-1000 degrees C. USE - Method for improving quality of wafer useful for producing crystalline silicon solar cells, silicon thin-film solar cells, sensors, actuators, silicon-based light emitting diodes, flat panel displays and optical filters and in silicon on insulator technology (all claimed). ADVANTAGE - The method ensures improving the quality of wafer with improved diffusion ability.
Language
de
Patenprio
DE 102009055685 A: 20091125