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Fabrication of SOI substrates with buried silicide layers for BiCMOS applications

: Wiemer, M.; Zimmermann, S.; Zhao, Q.T.; Trui, B.; Kaufmann, C.; Mantl, S.; Dudek, V.; Gessner, T.

Hobart, K.D. ; Electrochemical Society -ECS-, Electronics Division:
Semiconductor wafer bonding VIII. Science, technology, and applications : Proceedings of the international symposium; Eighth International Symposium on Semiconductor Wafer Bonding: Science, Technology, and Applications, held in May 2005 in Quebec City, Canada, as part of the 2005 spring meeting of the Electrochemical Society
Pennington: Electrochemical Society, 2005 (Electrochemical Society. Proceedings 2005-2)
ISBN: 1-566-77460-8
Electrochemical Society (Spring Meeting) <2005, Quebec>
Fraunhofer IZM ()

A new approach for a BiCMOS technology based on Silicon on Metal on Insulator (SOMI) technology will be presented. The SOMI technology includes cobalt silicidation, wafer bonding and CMP processes. CoSi2 is used to form the SOMI substrate, because CoSi2 has a high thermal stability, a low resistivity, and is relatively easy to fabricate. Two different process flows to prepare a SOMI substrate with thin silicon layers on a buried CoSi2 layer are shown. The first process is a modified BESOI method and the second uses a H+ Implanted Layer Splitting (HILS) regime combined with wafer bonding. Both process flows could be realized successfully. The paper describes the cobalt film deposition, the silicidation, the implantation, the wafer bonding process and the CMP to planarize the silicon film roughness as well as some special effects observed during the fabrication process.