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Parametric study of dielectric loaded surface plasmon polariton add-drop filters for hybrid silicon/plasmonic optical circuitry

: Dereux, A.; Hassan, K.; Weeber, J.-C.; Djellali, N.; Bozhevolnyi, S.I.; Tsilipakos, O.; Pitilakis, A.; Kriezis, E.; Papaioannou, S.; Vyrsokinos, K.; Pleros, N.; Tekin, T.; Baus, M.; Kalavrouziotis, D.; Giannoulis, G.; Avramopoulos, H.


Razeghi, M. ; Society of Photo-Optical Instrumentation Engineers -SPIE-, Bellingham/Wash.:
Quantum sensing and nanophotonic devices VIII : 23 - 27 January 2011, San Francisco, California, United States; Part of SPIE photonics west
Bellingham, WA: SPIE, 2011 (Proceedings of SPIE 7945)
ISBN: 978-0-8194-8482-6
Paper 794513
Conference "Quantum Sensing and Nanophotonic Devices" <8, 2011, San Francisco/Calif.>
Photonics West Conference <2011, San Franciso/Calif.>
Fraunhofer IZM ()

Surface plasmons polaritons are electromagnetic waves propagating along the surface of a conductor. Surface plasmons photonics is a promising candidate to satisfy the constraints of miniaturization of optical interconnects. This contribution reviews an experimental parametric study of dielectric loaded surface plasmon waveguides ring resonators and add-drop filters within the perspective of the recently suggested hybrid technology merging plasmonic and silicon photonics on a single board (European FP7 project PLATON "Merging Plasmonic and Silicon Photonics Technology towards Tb/s routing in optical interconnects"). Conclusions relevant for dielectric loaded surface plasmon switches to be integrated in silicon photonic circuitry will be drawn. They rely on the opportunity offered by plasmonic circuitry to carry optical signals and electric currents through the same thin metal circuitry. The heating of the dielectric loading by the electric current enables to design low foot-print thermo-optical switches driving the optical signal flow.