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Early mask making during the 1960's in Dresden

: Becker, H.W.


Behringer, U. ; VDE/VDI-Gesellschaft Mikroelektronik, Mikro- und Feinwerktechnik -GMM-; Semiconductor Equipment and Materials International -SEMI-, San Jose/Calif.; Society of Photo-Optical Instrumentation Engineers -SPIE-, Bellingham/Wash.; Forschungszentrum Karlsruhe GmbH, Institut für Mikrostrukturtechnik:
EMC 2003, , 19th European Mask Conference on Mask Technology for Integrated Circuits and Micro-Components. Lectures held at the GMM-conference : January 13 - 15, 2003 in Sonthofen, Germany
Berlin: VDE-Verlag, 2003 (GMM-Fachbericht 39)
ISBN: 3-8007-2748-X
European Mask Conference on Mask Technology for Integrated Circuits and Micro-Components (EMC) <19, 2003, Sonthofen>
Fraunhofer IPMS ()
integrated circuit; microlithography; mask technology

One of the first European institutes for microelectronics, the Arbeitsstelle für Molekularelektronik Dresden AME, was founded in 1961 by WERNER HARTMANN. The purpose was to develop processes for fabrication of integrated circuits. Concerning microlithography at first a five-stage mask technique was used since 1965. The artwork original which was called "Vorlage" was cut with a scale of about 200:1. Using a reduction camera the artwork original was reduced about 20 times, to get the reticle known as the "Zwischennegativ". This reticle was then further reduced about 10 times by "step and repeat", using a projection microscope, to get a master mask known as the "Originalschablone" whose scale was then 1:1. By direct photocopying of the master mask one obtained a working mask which was called the "Arbeitsschablone". Finally, an aligned direct exposure of the working mask on to a wafer created, layer by layer, the micro-pattern of the chip array. Concerning the materials a double layer film was used for the artwork originals, and 2 inch photographic plates were used for the reticles and masks. In this way the first East German bipolar integrated circuits, NOR gates with 8 transistors, were made in Dresden in 1967. This was done with 4 masking levels on 25 mm Si wafers with 1.5 mm chip size and 20 µm minimal figure width (critical dimensions). In the late 1960's some improvements were introduced, particularly the 6-barrel semi-automatic photorepeater, which improved the figure width and gave lower tolerances. The largest chip made in 1969 was a J-K master-slave flipflop, this contained 36 transistors on a chip 1.6 mm x 1.8 mm and was done with 9 masking levels and with 10 µm minimal figure width.