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Encapsulation of systems in package - process characterization and optimization

: Schreier-Alt, T.; Schindler-Saefkow, F.; Wittler, O.; Kittel, H.


Institute of Electrical and Electronics Engineers -IEEE-:
2nd Electronics Systemintegration Technology Conference, ESTC 2008. Proceedings. Vol.2 : 1st - 4th September 2008, Greenwich, London, UK
Piscataway, NJ: IEEE, 2008
ISBN: 978-1-4244-2813-7
ISBN: 978-1-4244-2814-4
ISBN: 1-4244-2813-0
S.1017 - 1022
Electronics Systemintegration Technology Conference (ESTC) <2, 2008, London>
Fraunhofer IZM ()

This paper investigates different stress and strain measurement methods usable during packaging of electronic systems. By applying stress measurement chips, embedded fiber optic Bragg grating (FBG) sensors and pressure sensitive multilayers it is possible to determine the stress condition on the surface of silicon chips, on various substrates and within epoxy polymers.