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Non-destructive failure analysis and modeling of encapsulated miniature SMD ceramic chip capacitors under thermal and mechanical loading

 
: Wunderle, B.; Braun, T.; May, D.; Mazloum, A.; Bouazza, M.; Walter, H.; Wittier, O.; Schacht, R.; Becker, K.-F.; Schneider-Ramelow, M.; Michel, B.; Reichl, H.

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Circuits Multi-Projets -CMP-, Grenoble; Institute of Electrical and Electronics Engineers -IEEE-; Components, Packaging and Manufacturing Technology Society -CPMT-:
13th International Workshop on Thermal Investigation of ICs and Systems, 2007, THERMINIC 2007. Electronic Resource : 17 - 19 Sept. 2007, Budapest
Piscataway: IEEE, 2007
ISBN: 978-2-35500-002-7
S.104-109
International Workshop on Thermal Investigation of ICs and Systems <13, 2007, Budapest>
Englisch
Konferenzbeitrag
Fraunhofer ENAS ()
Fraunhofer IZM ()
ceramic capacitors; crack detection; failure analysis; nondestructive testing; reliability; surface mount technology

Abstract
The use of multi-layer ceramic chip capacitors as integrated passive in e. g. system in package applications needs methods to examine and predict their reliability. Therefore, a nondestructive failure analytical technique is described to detect cracks in the ceramic and the metallic layers within encapsulated 0402 SMD capacitors. After choosing from techniques to reproducibly generate cracks, it is shown that an in-situ capacitance measurement is a convenient method to detect these failures unambiguously. Finite Element simulations support the experimental results. A reliability estimate for capacitor integrity under given loading conditions is given.

: http://publica.fraunhofer.de/dokumente/N-154627.html