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Performance, accuracy, power consumption and resource utilization analysis for hardware / software realized artificial neural networks

 
: Braga, A.L.; Llanos, C.H.; Göhringer, D.; Obie, J.; Becker, J.; Hübner, M.

:

Nagar, A.K. ; Institute of Electrical and Electronics Engineers -IEEE-; IEEE Computer Society:
IEEE Fifth International Conference on Bio-Inspired Computing: Theories and Applications, BIC-TA 2010. Proceedings. Vol.2 : 8-10 September 2010, Liverpool; 23-26 Sept. 2010, Changsha, China
New York, NY: IEEE, 2010
ISBN: 978-1-4244-6438-8 (Print)
ISBN: 978-1-4244-6439-5 (CD-ROM)
ISBN: 978-1-4244-6437-1
S.1629-1636
International Conference on Bio-Inspired Computing - Theories and Applications (BIC-TA) <5, 2010, Liverpool, Changsha>
Englisch
Konferenzbeitrag
Fraunhofer IOSB ()
artificial neural network; FPGA; power consumption

Abstract
Artificial Neural Networks (ANN) are used to perform tasks like classification, pattern recognition and function approximations in many cases to which traditional approaches are not well suited. Hardware implementations have been presented, mainly in academical works, in order to take advantage of the inherent parallelism in ANNs. In the field of embedded systems it is desirable to have faster and less power demanding designs. This work analyzes implementations of ANNs in FPGAs both in Hardware Description Language (HDL) and in software code running on different configurations of the Xilinx MicroBlaze microprocessor. Three versions of an ANN design were implemented in HDL and a software version was executed in four different configurations of the Xilinx MicroBlaze microprocessor. Results for power consumption, FPGA occupation, speed and accuracy of the outputs are presented for practical experiments performed in two FPGAs from different families of Xilinx devices: a Spartan 3E and a Virtex 5.

: http://publica.fraunhofer.de/dokumente/N-149025.html