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Konzept zur Reduktion eines Phasenrauschens eines PLL-Frequenzgenerators

Radio frequency identification system has phase-detent phase locked loop oscillator with oscillator frequency which lies above predetermined system frequency area
 
: Meyer, F.; Bögel, G. vom; Meyer, S.

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Frontpage ()

DE 102009021937 A: 20090519
DE 102009021937 A: 20090519
H03L0007
H04B0001
Deutsch
Patent, Elektronische Publikation
Fraunhofer IMS ()

Abstract
(A1) Die vorliegende Erfindung betrifft RFID-System mit einem vorbestimmten Systemfrequenzbereich, wobei das RFID-System einen phasengerasteten PLL-Oszillator (200) mit einer Oszillatorfrequenz (fo') aufweist, die oberhalb des vorbestimmten Systemfrequenzbereichs liegt.

 

DE 102009021937 A1 UPAB: 20101203 NOVELTY - The Radio frequency identification system has a phase-detent phase locked loop (PLL) oscillator with an oscillator frequency (f-o') which lies above a predetermined system frequency area. The phase-detent PLL oscillator has a controlled oscillator (130) which is formed to supply an oscillator signal with the oscillator frequency corresponding to multiple output frequency (f-aus) of the system frequency area depending on a control signal. DETAILED DESCRIPTION - An INDEPENDENT CLAIM is also included for a method for operating a radio frequency identification system. USE - Radio frequency identification system. ADVANTAGE - The phase-detent PLL oscillator has a controlled oscillator which is formed to supply an oscillator signal with the oscillator frequency corresponding to multiple output frequency of the system frequency area depending on a control signal, and hence reduces the reduce the phase noise of a frequency generator.

: http://publica.fraunhofer.de/dokumente/N-148700.html