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Three-dimensional simulation of the channel stop implant effects in sub-quarter micron PMOS transistors

Dreidimensionale Simulation der Wirkung der Kanalstopimplantation in Subviertelmikrometer-PMOS-Transistoren
 
: Burenkov, A.; Lorenz, J.

Baccarani, G.:
ESSDERC 2002. Proceedings of the 32nd European Solid-State Device Research Conference : 24-26 September 2002 Firenze, Italy
Bologna: University of Bologna, 2002
ISBN: 88-900847-8-2
S.339-342
European Solid-State Device Research Conference (ESSDERC) <32, 2002, Firenze>
Englisch
Konferenzbeitrag
Fraunhofer IIS B ( IISB) ()
CMOS; 3D-simulation; implantation; doping distribution; shallow trench isolation; STI; small size CMOS transistor; MOSFET; PMOS transistor 3D simulation; channel stop implant effect; narrow channel effect suppression; active area edge leakage current crowding; MOS Transistor; coupled 3D process/device simulation; optimum ion implantation condition; parasitic current crowding suppression; arsenic doped channel

Abstract
The possibility to suppress the narrow channel effect due to the crowding of the leakage current near the edge of the active area in sub-quarter micrometer MOS transistors by means of a special channel stop implant has been investigated using coupled three-dimensional process and device simulation. Optimum ion implantation conditions for the suppression of the parasitic current crowding in a 0.16 µm PMOS transistor with an arsenic doped channel were found.

: http://publica.fraunhofer.de/dokumente/N-14477.html