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Real time processor for video signal processing

 
: Liebsch, W.; Zier, D.

Goser, K.:
Mikroelektronik für die Informationstechnik - Vermittlung, Übertragung und Verarbeitung : Vorträge d. NTG-Fachtagung vom 29.-30.9.1986 in Berlin
Berlin: VDE Verlag, 1986 (NTG-Fachberichte 96)
ISBN: 3-8007-1494-9
S.293-297
Nachrichtentechnische Gesellschaft (Fachtagung) <1986, Berlin/West>
Englisch
Konferenzbeitrag
Fraunhofer HHI ()
cellular arrays; computerised signal processing; emitter-coupled logic; microprocessor chips; real-time systems; video signals; video signal processing; ecl technology; arithmetic unit; macrocell array; host computer; processing unit; source file program

Abstract
The processor was build in 100 k-ECL technology and the arithmetic unit was integrated in the ECL macrocell array. The processor is connected to peripheral units via three buses and has an interface to host computer-for programme development. The control logic of the processor is built of 100 k-ECL units. Block diagrams of the system and of the processing unit are shown. Peripheral units have separate input/output buses to reduce the reflections. The structure of the two-dimensional DPCM coder and its source file program are shown.

: http://publica.fraunhofer.de/dokumente/N-13970.html