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Memory structure and data flow control for HDTV systems

: Heeren, H.; Selinger, T.

Reiner, H. ; Informationstechnische Gesellschaft -ITG-, Fachbereich Mikroelektronik:
Mikroelektronik für die Informationstechnik : Vorträge der ITG-Fachtagung vom 3. bis 5. Oktober 1989 in Stuttgart
Berlin: VDE-Verlag, 1989 (ITG-Fachberichte 110)
ISBN: 3-8007-1666-6
Fachtagung Mikroelektronik für die Informationstechnik <1989, Stuttgart>
Fraunhofer HHI ()
computerised signal processing; high definition television; television systems; data flow control; HDTV systems; signal processing components; video signal; flexible memory addressing; memory design; addressing function; signal processing algorithms

Most of the algorithms recommended for the signal processing components of HDTV require the storage of the video signal in some form of memory. For the installation of integrated HDTV subsystems in systems with various configurations, variable control of the data flow, i.e. flexible memory addressing, is necessary. This paper discusses various memory design concepts and their interaction with a controller, deriving the addressing function from the signal processing algorithms. The development of the controller is described, and also a compact system implementation using the most modern construction and interconnection techniques.