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Sensitivity of a 20-GS/s InP DHBT latched comparator

: Kraus, S.; Makon, R.E.; Kallfass, I.; Driad, R.; Moyal, M.; Ritter, D.


Institute of Electrical and Electronics Engineers -IEEE-:
22nd International Conference on Indium Phosphide and Related Materials, IPRM 2010. CD-ROM : May 31 2010-June 4 2010, Takamatsu Symbol Tower, Kagawa, Japan
New York, NY: IEEE, 2010
ISBN: 978-1-4244-5921-6
ISBN: 978-1-4244-5919-3
International Conference on Indium Phosphide and Related Materials (IPRM) <22, 2010, Kagawa/Japan>
Fraunhofer IAF ()

We present simulations and measurements of the sensitivity of a master-slave emitter-coupled logic (ECL) latched comparator implemented in an InP/GaInAs DHBT technology. The circuit exhibited simulated and experimental sensitivities of 11.5 mV and 17 mV, respectively, at a clock rate of 20 GHz, with no preamplifier.