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Hardware implementation of a codec for digital HDTV recording


Yasuda, H. ; European Association for Signal Processing -EURASIP-:
Signal processing of HDTV, III : Proceedings of the Fourth International Workshop on HDTV and beyond, Turin, Italy, 4 - 6 September 1991
Amsterdam: Elsevier, 1992
ISBN: 0-444-89491-8
International Workshop on HDTV and beyond <4, 1991, Torino>
Fraunhofer HHI ()
data compression; discrete cosine transforms; high definition television; image coding; video tape recorders; interframe editing; digital HDTV recording; data rate reduction codec; video cassette recorder; dct; adaptive quantization; variable length encoding; shuttle mode; codec architecture

This paper describes the hardware realization of a data rate reduction codec used for increasing the playing time of a digital video cassette recorder. The experimental codec is designed for reduction factors between 2 and 5. Algorithms utilized for data rate reduction are DCT, adaptive quantization and variable length encoding. Interframe editing and shuttle mode are supported by a special codec architecture.